1. Field of the Disclosure
The invention generally relates to a method for fabricating a semiconductor device, and, more particularly, to a method for forming a semiconductor device having a floating body transistor.
2. Brief Description of Related Technology
A semiconductor memory apparatus is configured to store data generated or processed therein. For example, if a request from a data processor, such as a central processing unit (CPU), is received, the semiconductor memory apparatus outputs data to the data processor from unit cells therein or stores data processed by the data processor to the unit cells according to an address transmitted with the request.
The data storage capacity of semiconductor memory apparatuses has increased without a corresponding increase in the size of the semiconductor memory apparatus. The sizes of various components and elements for read or write operations have also been reduced. Unnecessary, duplicate components and elements in the semiconductor memory apparatus, such as transistors or wires, are combined or merged to decrease the area occupied by each component. A reduction of the size of unit cells included in the semiconductor memory apparatus affects improvement of integration because the unit cells occupy one of the largest areas therein.
For example, in a Dynamic Random Access Memory (DRAM) device, a type of volatile memory device configured to retain data while a power source is supplied, the unit cell comprises a transistor and a capacitor. After the data “1” is delivered to the capacitor, charges temporarily stored in a storage node dissipate, i.e., amount of the charges is decreased, as a result of both leakage currents generated at the junction of the storage nodes and instinctive characteristics of the capacitor. As a result, performance of a refresh operation on the unit cells is periodically required to prevent destruction of the data on the DRAM device.
Numerous methods for increasing capacitance (Cs) of the capacitor included in the unit cell have been suggested, which would allow for a larger amount of charges to be stored in the storage node. For example, the typical oxide film used as the insulating film of the capacitor can be replaced with an advanced insulating film, which has a larger dielectric constant, such as, for example, a nitrified oxide film or a high dielectric film. Alternatively, the typical two-dimensional capacitor structure can be replaced with a three-dimensional cylindrical structure or a trench structure, which can increase the surface area of both of the electrodes of the capacitor.
As the design rule is reduced, the area in which a capacitor can be formed is also reduced, and it is difficult to develop suitable insulating film materials for the capacitor. As a result of the reduced capacitor area, a junction resistance value of the storage node and a turn-on resistance value of the transistor in the unit cell are increased, making it difficult to perform normal read and write operations, and deteriorating refresh characteristics.
In order to improve the above-described shortcomings, the unit cell can include a transistor having a floating body, and the capacitor can be eliminated. Data is stored in a floating body of the transistor, rather than a capacitor.
Data is stored in the floating body by reducing a voltage level supplied on the word line to ½ or ⅓ of the voltage level applied to the bit line connected to one active region of the transistor, to thereby generate hot carriers. When the data “1” is delivered, a large amount of hot carriers are generated in a junction region of the bit lines. Then, electrons are sent out into the bit line, while the holes remain in the floating body. When the data “0” is transmitted, hot carriers are not generated in the junction region, and the holes do not remain in the floating body. Storage of holes in the floating body lowers the threshold voltage of the transistor of the unit cell. As a result, the amount of a current flowing through the transistor increases. That is, the amount of the current flowing when the holes are stored in the floating body is larger than that flowing when holes are not stored. As a result, it is possible to distinguish whether the data “1” or “0” is stored in the unit cell.
Although elimination of the capacitor improves integration of the semiconductor memory apparatus, a leakage current that occurs at a source line junction and/or bit line junction makes it difficult to prevent reduction of the amount of holes stored in the floating body. Generally, the active region (i.e., the source and/or drain regions) of the transistor, which is connected to the bit line or the source line, includes a high concentration of impurities to reduce resistance resulting from the junction with the metal lines. However, the amount of leakage current between the active region and the floating body can increase if the active region is doped with a high concentration of impurities. As a result, the amount of holes stored in the floating body can dissipate over time. The amount of the leakage current also increases proportionally to temperature increases. As a result, data stored in the transistor of the unit cell is easily deleted under high temperature conditions.
In order to maximize the cell packing density, it is advantageous to isolate cells in the single active region than to separate unit cells through an isolation film formed by a shallow trench isolation (STI) process performed on a floating body transistor formed over a SOI semiconductor substrate. However, because the distance between the source and drain regions of the transistor having a channel region is decreased to reduce the overall size of the transistor, it is difficult to prevent a short channel effect, such as the punch-through phenomenon. The punch-through phenomenon more frequently occurs in the lower portion of the floating body than in the upper portion of the floating body, because the channel doping concentration increases from the bottom of the gate pattern to the top thereof. Furthermore, it is necessary to maximize the capacity of the body so that the floating body transistor may store more holes in the floating body corresponding to data.
In order to prevent a short channel effect, a local doping region is generally formed in the floating body through an ion-implanting process. However, due to the reduction of the design rule, it is difficult to precisely form the local doping region in an expected region of the floating body through the ion-implanting process. As a result, it is difficult to prevent the short channel effect including the punch-through phenomenon of the floating body transistor, which can degrade the reliability of the semiconductor device.